1. Field of the Invention
The present invention relates to a switching power supply device.
2. Description of the Prior Art
An example of a conventional switching power supply device is shown in FIG. 11. The switching power supply device includes a converter portion 100 and a controller portion 200. The switching power supply device converts a direct-current voltage fed in via an input terminal IN into a desired direct-current voltage, and then supplies the thus obtained direct-current voltage to a load resistor RL.
First, the configuration of the converter portion 100 will be described. The converter portion 100 includes a capacitor 1, an NPN-type transistor 2, a diode 3, a coil 4, and an output capacitor 5, which together constitute a step-down type DCxe2x80x94DC converter. The collector of the transistor 2 is connected to the input terminal IN and to one end of the capacitor 1. The emitter of the transistor 2 is connected to the cathode of the diode 3 and to one end of the coil 4.
The end of the coil 4 which is not connected to the transistor 2 is connected to the output capacitor 5, is connected also via an output terminal OUT to the load resistor RL, and is connected also via the output terminal OUT to the resistor R1 (described later) provided in the controller portion 200. The end of the capacitor 1 which is not connected to the transistor 2, the anode of the diode 3, the end of the output capacitor 5 which is not connected to the coil 4, and the end of the load resistor RL which is not connected to the output terminal OUT are each grounded.
Next, the configuration of the controller portion 200 will be described. The controller portion 200 includes an output voltage detection circuit 6, an error amplifier 7, a reference voltage source 8, an operational amplifier 9, an oscillator 10, and a driver circuit 11. The output voltage detection circuit 6 is composed of a resistor R1 and a resistor R2 that is connected in series with the resistor R1. One end of the resistor R1 is connected to the output terminal OUT, and the end of the resistor R2 which is not connected to the resistor R1 is grounded. The node between the resistors R1 and R2 is connected to the inverting input terminal of the error amplifier 7. The non-inverting input terminal of the error amplifier 7 is connected to the reference voltage source 8.
The output terminal of the error amplifier 7 is connected to the non-inverting input terminal of the operational amplifier 9. The inverting input terminal of the operational amplifier 9 is connected to the oscillator 10. The output terminal of the operational amplifier 9 is connected through the driver circuit 11 to the base of the transistor 2.
Next, the operation of the switching power supply device configured as described above will be described. The direct-current voltage fed in via the input terminal IN is first smoothed by the capacitor 1 so as to be formed into an input voltage VIN, and is then converted into a pulse voltage by the switching operation of the transistor 2.
When the transistor 2 is in an on state, a current flows from the input terminal IN to the coil 4. As a result, energy is not only accumulated in the coil 4, but also supplied to the load resistor RL. On the other hand, when the transistor 2 is in an off state, the energy accumulated in the coil 4 is supplied through the diode 3 to the load resistor RL. Here, to the output terminal OUT is supplied an output voltage VO smoothed by the output capacitor 5, and this output voltage VO is applied to the load resistor RL.
The output voltage VO of the switching power supply device is fed via the output terminal OUT to the controller portion 200 so as to be subjected to feedback control performed by the controller portion 200. Specifically, according to the output voltage VO of the switching power supply device, the duty factor, i.e. the ratio of the on periods to the sum of the on and off periods, of the pulse voltage output from the transistor 2 is determined. The output voltage VO of the switching power supply device is first divided by the output voltage detection circuit 6. The thus divided voltage Vadj is then compared with a reference voltage Vref(=1.25 V) output from the reference voltage source 8 by the error amplifier 7.
The error amplifier 7 amplifies the difference between the divided voltage Vadj and the reference voltage Vref, and outputs an output voltage signal VA to the operational amplifier 9. The operational amplifier 9, in synchronism with the output voltage VOSC (a triangular wave) of the oscillator 10, outputs a PWM signal VPWM corresponding to the output voltage signal VA. Specifically, when the output voltage signal VA from the error amplifier 7 is higher than the output voltage VOSC from the oscillator 10, the operational amplifier 9 outputs a high level as the PWM signal VPWM, and otherwise, i.e. when the output voltage signal VA from the error amplifier 7 is not higher than the output voltage VOSC from the oscillator 10, the operational amplifier 9 outputs a low level as the PWM signal VPWM. Here, the frequency of the output voltage VOSC (a triangular wave) oscillated by the oscillator 10 is set to be 100 kHz to prevent audible noise. Moreover, the maximum and minimum levels of the output voltage VOSC (a triangular wave) oscillated by the oscillator 10 are set to be 1.75 V and 0.75 V, respectively.
The PWM signal VPWM is fed to the driver circuit 11, and the driver circuit 11, according to the PWM signal VPWM, supplies a current to the base of the transistor 2 and thereby controls the switching operation of the transistor 2. Specifically, when the driver circuit 11 receives a high level as the PWM signal VPWM from the operational amplifier 9, it feeds a current IB to the base of the transistor 2 to bring the transistor 2 into an on state. On the other hand, when the driver circuit 11 receives a low level as the PWM signal VPWM, it turns the current IB supplied to the base of the transistor 2 to zero and thereby brings the transistor 2 into an off state. In this way, the ratio of the on periods tON to the off periods tOFF of the transistor 2 is controlled in such a way that the output voltage VO of the switching power supply device which is supplied to the load resistor RL is stabilized at a predetermined level (5 V). The duty factor xe2x80x9cdutyxe2x80x9d of the PWM signal VPWM and of the transistor 2 is given by formula (1) below.                     duty        =                                                            t                ON                                                              t                  ON                                +                                  t                  OFF                                                      xc3x97            100                    =                                                    V                O                                            V                IN                                      xc3x97            100                                              (        1        )            
In the on periods tON, in which the transistor 2 is in an on state, the gradient of the current IL that flows through the coil 4 is positive, and, in the off periods tOFF, in which the transistor 2 is in an off state, the gradient of the current IL that flows through the coil 4 is negative.
To cope with this, as described earlier, a voltage smoothed by the output capacitor 5 is supplied as the output voltage VO to the load resistor RL. However, equivalent series resistance (hereinafter referred to as ESR) exists in the output capacitor 5, and therefore the output voltage Vo contains a ripple voltage Vrms, i.e. an alternating-current component. FIG. 12 shows a time chart of the output voltage signal VA from the error amplifier 7, the output voltage VOSC from the oscillator 10, and the PWM signal VPWM as observed at room temperature (25xc2x0 C.). The frequency of the PWM signal VPWM is equal to that of the output voltage VOSC from the oscillator 10, and therefore the switching frequency f0 of the transistor 2 is equal to the frequency of the output voltage VOSC from the oscillator 10, i.e. 100 kHz.
However, as the temperature falls, the ESR of the output capacitor 5 increases, and thus, as shown in FIG. 13, the ripple voltage Vrms contained in the output voltage VO increases.
Here, as shown in FIG. 14, the gain GAMP of the error amplifier 7 is fixed at 100 irrespective of the divided voltage Vadj fed to its inverting input terminal. Thus, the input-output characteristic of the error amplifier 7, i.e. the relationship between the divided voltage Vadj and the output voltage signal VA, is as shown in FIG. 15. On the other hand, the input-output characteristic of the operational amplifier 9, i.e. the relationship between the output voltage signal VA and the duty factor xe2x80x9cdutyxe2x80x9d of the PWM signal VPWM, is as shown in FIG. 16.
In the switching power supply device having these characteristics, a malfunction in which the switching frequency f0 of the transistor 2 becomes equal to half the oscillation frequency of the oscillator 10 occurs when the ripple voltage Vadj1 contained in the divided voltage Vadj fed to the error amplifier 7 and the duty factor xe2x80x9cdutyxe2x80x9d has a relationship as shown in FIG. 17. In general, a switching power supply device provided with a step-down type DCxe2x80x94DC converter is used in the range of duty factors xe2x80x9cdutyxe2x80x9d from 0% to 50%. Thus, as FIG. 17 clearly shows, the lower the duty factor xe2x80x9cdutyxe2x80x9d, the lower the ripple voltage Vadj1 at which the malfunction occurs. That is, the lower the duty factor xe2x80x9cdutyxe2x80x9d, the more likely the malfunction occurs.
FIG. 18 shows a diagram in which the ripple voltage Vrms contained in the output voltage VO shown in FIG. 13 is converted into the ripple voltage Vadj2 contained in the divided voltage Vadj. It is to be noted that in FIG. 18 is indicated the ripple voltage V10%, as calculated on the basis of FIG. 17, contained in the divided voltage Vadj when the malfunction occurs at a duty factor xe2x80x9cdutyxe2x80x9d of 10%. As FIG. 18 clearly shows, at a duty factor xe2x80x9cdutyxe2x80x9d of 10%, a malfunction in which the switching frequency f0 of the transistor 2 becomes equal to half the oscillation frequency of the oscillator 10 occurs at a temperature of xe2x88x9225xc2x0 C. This is because, as shown in FIG. 19, the ripple voltage contained in the output voltage signal VA from the error amplifier 7 becomes so high that the amplitude of the output voltage signal VA becomes greater than that of the output voltage VOSC from the oscillator 10, with the result that the frequency of the PWM signal VPWM becomes equal to twice the frequency of the output voltage VOSC from the oscillator 10.
The ripple voltage Vrms contained in the output voltage VO is inversely proportional to the switching frequency f0 of the transistor 2, and therefore, when the switching frequency f0 of the transistor 2 becomes equal to half the oscillation frequency of the oscillator 10 as described above, the ripple voltage Vrms becomes twice as high, degrading the stability of the output voltage VO and increasing the ripple voltage contained therein.
An object of the present invention is to provide a switching power supply device of which the output voltage contains no higher ripple voltage even when the switching power supply device is used at low temperatures.
To achieve the above object, according to the present invention, a switching power supply device is provided with a DCxe2x80x94DC converter that receives an input voltage and outputs a varying voltage by varying the ratio of on periods to off periods of a switching transistor, an error amplifier that compares the output voltage of the DCxe2x80x94DC converter or a divided voltage thereof with a reference voltage and outputs an error voltage, an operator that produces a pulse signal according to the error voltage and controls the switching transistor with the pulse signal, and a gain control circuit that varies the gain of the error amplifier according to at least one of the duty factor of the pulse signal and the ambient temperature.